The present disclosure is related to the manufacturing of integrated circuits, and more particularly to the use of curvilinear patterns for making photomasks.
In the production or manufacturing of semiconductor devices, such as integrated circuits, optical lithography may be used to fabricate the semiconductor devices. Optical lithography is a printing process in which a lithographic mask or photomask manufactured from a reticle is used to transfer patterns to a substrate such as a semiconductor or silicon wafer to create the integrated circuit (I.C.). Other substrates could include flat panel displays, holographic masks, or even other reticles. While conventional optical lithography uses a light source having a wavelength of 193 nm, extreme ultraviolet (EUV) or X-ray lithography are also considered types of optical lithography in this application. The reticle or multiple reticles may contain a circuit pattern corresponding to an individual layer of the integrated circuit, and this pattern can be imaged onto a certain area on the substrate that has been coated with a layer of radiation-sensitive material known as photoresist or resist. Once the patterned layer is transferred the layer may undergo various other processes such as etching, ion-implantation (doping), metallization, oxidation, and polishing. These processes are employed to finish an individual layer in the substrate. If several layers are required, then the whole process or variations thereof will be repeated for each new layer. Eventually, a combination of multiples of devices or integrated circuits will be present on the substrate. These integrated circuits may then be separated from one another by dicing or sawing and then may be mounted into individual packages. In the more general case, the patterns on the substrate may be used to define artifacts such as display pixels, holograms, or magnetic recording heads.
In the production or manufacturing of semiconductor devices, such as integrated circuits, non-optical methods may be used to transfer a pattern on a lithographic mask to a substrate such as a silicon wafer. Nanoimprint lithography (NIL) is an example of a non-optical lithography process. In nanoimprint lithography, a lithographic mask pattern is transferred to a surface through contact of the lithography mask with the surface.
In the production or manufacturing of semiconductor devices, such as integrated circuits, maskless direct write may also be used to fabricate the semiconductor devices. Maskless direct write is a printing process in which charged particle beam lithography is used to transfer patterns to a substrate such as a semiconductor or silicon wafer to create the integrated circuit. Other substrates could include flat panel displays, imprint masks for nano-imprinting, or even reticles. Desired patterns of a layer are written directly on the surface, which in this case is also the substrate. Once the patterned layer is transferred the layer may undergo various other processes such as etching, ion-implantation (doping), metallization, oxidation, and polishing. These processes are employed to finish an individual layer in the substrate. If several layers are required, then the whole process or variations thereof will be repeated for each new layer. Some of the layers may be written using optical or non-optical lithography while others may be written using maskless direct write to fabricate the same substrate. Also, some patterns of a given layer may be written using optical or non-optical lithography, and other patterns written using maskless direct write. Eventually, a combination of multiples of devices or integrated circuits will be present on the substrate. These integrated circuits are then separated from one another by dicing or sawing and then mounted into individual packages. In the more general case, the patterns on the surface may be used to define artifacts such as display pixels, holograms, or magnetic recording heads.
Two common types of charged particle beam lithography are variable shaped beam (VSB) and character projection (CP). These are both sub-categories of shaped beam charged particle beam lithography, in which a precise electron beam is shaped and steered so as to expose a resist-coated surface, such as the surface of a wafer or the surface of a reticle. In VSB, these shapes are simple shapes, usually limited to rectangles of certain minimum and maximum sizes and with sides which are parallel to the axes of a Cartesian coordinate plane (i.e. of “manhattan” orientation), and 45 degree right triangles (i.e. triangles with their three internal angles being 45 degrees, 45 degrees, and 90 degrees) of certain minimum and maximum sizes. At predetermined locations, doses of electrons are shot into the resist with these simple shapes. The total writing time for this type of system increases with the number of shots. In character projection (CP), there is a stencil in the system that has in it a variety of apertures or characters which may be complex shapes such as rectilinear, arbitrary-angled linear, circular, nearly circular, annular, nearly annular, oval, nearly oval, partially circular, partially nearly circular, partially annular, partially nearly annular, partially nearly oval, or arbitrary curvilinear shapes, and which may be a connected set of complex shapes or a group of disjointed sets of a connected set of complex shapes. An electron beam can be shot through a character on the stencil to efficiently produce more complex patterns on the reticle. In theory, such a system can be faster than a VSB system because it can shoot more complex shapes with each time-consuming shot. Thus, an E-shaped pattern shot with a VSB system takes four shots, but the same E-shaped pattern can be shot with one shot with a character projection system. Note that VSB systems can be thought of as a special (simple) case of character projection, where the characters are just simple characters, usually rectangles or 45-45-90 degree triangles. It is also possible to partially expose a character. This can be done by, for instance, blocking part of the particle beam. For example, the E-shaped pattern described above can be partially exposed as an F-shaped pattern or an I-shaped pattern, where different parts of the beam are cut off by an aperture. This is the same mechanism as how various sized rectangles can be shot using VSB. In this disclosure, partial projection is used to mean both character projection and VSB projection.
As indicated, in lithography the lithographic mask or reticle comprises geometric patterns corresponding to the circuit components to be integrated onto a substrate. The patterns used to manufacture the reticle may be generated utilizing computer-aided design (CAD) software or programs. In designing the patterns the CAD program may follow a set of pre-determined design rules in order to create the reticle. These rules are set by processing, design, and end-use limitations. An example of an end-use limitation is defining the geometry of a transistor in a way in which it cannot sufficiently operate at the required supply voltage. In particular, design rules can define the space tolerance between circuit devices or interconnect lines. The design rules are, for example, used to ensure that the circuit devices or lines do not interact with one another in an undesirable manner. For example, the design rules are used so that lines do not get too close to each other in a way that may cause a short circuit. The design rule limitations reflect, among other things, the smallest dimensions that can be reliably fabricated. When referring to these small dimensions, one usually introduces the concept of a critical dimension. These are, for instance, defined as the smallest width of a line or the smallest space between two lines, those dimensions requiring exquisite control.
One goal in integrated circuit fabrication by optical lithography is to reproduce the original circuit design on the substrate by use of the reticle. Integrated circuit fabricators are always attempting to use the semiconductor wafer real estate as efficiently as possible. Engineers keep shrinking the size of the circuits to allow the integrated circuits to contain more circuit elements and to use less power. As the size of an integrated circuit critical dimension is reduced and its circuit density increases, the critical dimension of the circuit pattern or physical design approaches the resolution limit of the optical exposure tool used in conventional optical lithography. As the critical dimensions of the circuit pattern become smaller and approach the resolution value of the exposure tool, the accurate transcription of the physical design to the actual circuit pattern developed on the resist layer becomes difficult. To further the use of optical lithography to transfer patterns having features that are smaller than the light wavelength used in the optical lithography process, a process known as optical proximity correction (OPC) has been developed. OPC alters the physical design to compensate for distortions caused by effects such as optical diffraction and the optical interaction of features with proximate features. OPC includes all resolution enhancement technologies performed with a reticle.
Design rules for many current integrated circuit fabrication processes allow shapes to be designed that are much smaller in their minimum dimension than the wavelength of the light that will be used to transfer the design pattern from a mask to the wafer. In some advanced processes the design rules dictate a preferred wiring direction or orientation on one or more layers. For example, a process may restrict shapes on a given layer to have their longest dimension be aligned with the x-axis of the Cartesian plane. Alternatively, shapes having the smallest minimum dimension or minimum width may be restricted to the preferred orientation, but shapes with a width larger than the minimum width may not be restricted.
There are a number of technologies used for forming patterns on a reticle, including using optical lithography or charged particle beam lithography. The most commonly used system is the variable shaped beam (VSB), where, as described above, doses of electrons with simple shapes such as manhattan rectangles and 45-degree right triangles expose a resist-coated reticle surface. In conventional mask writing, the doses or shots of electrons are conventionally designed to avoid overlap wherever possible, so as to greatly simplify calculation of how the resist on the reticle will register the pattern.
Integrated circuits are physically designed with a plurality of layers, each of which contains a plurality of patterns. Many conventional integrated circuit design methodologies require that all patterns or shapes for many of the layers in a design be manhattan, so that edges of all patterns are parallel to the integrated circuit boundary. All corners in the patterns are therefore 90 degree angles. The mask-making process may gently round off these 90 degree corners. However, because of the limitations of optical lithography, the patterns registered by the resist on the substrate may be much more substantially rounded in the corners, for example, than the patterns on the mask. The resulting curvilinear patterns on the substrate therefore substantially differ from the post-OPC design pattern, and from the pattern on the mask. The differences between the pattern on the mask and the pattern registered by the resist on the substrate results in a high sensitivity to process changes, so that small process variations may cause relatively large changes in the curvilinear patterns on the substrate, perhaps affecting functional or parametric yield of an integrated circuit. It is desirable to reduce the sensitivity to process changes, thereby allowing improvement in integrated circuit yield.